Another Major Player Shakes Up the RISC-V Arena

Check out Electronic Design’s coverage of CES 2024. This video is also part of the TechXchange: RISC-V: The Instruction-Set Alternative.

What you’ll learn:

What’s up with the new MIPS?
Why MIPS technology will give RISC-V a leg up amongst its peers.


MIPS has been known for delivering low-power, high-performance embedded processor designs, but its MIPS architecture has been eclipsed by other RISC architectures like Arm and lately RISC-V. RISC-V developers are now MIPS’s target audience thanks to its RISC-V-based platforms. I talked with MIPS CEO, Sameer Wasson, about where MIPS is headed (see video above).

Chips based on the MIPS architecture are still employed, but going forward, RISC-V is what MIPS customers will be using. Keep in mind, RISC-V is just an instruction-set specification that’s supported by a number of vendors. Even FPGAs with hard-core RISC-V processor complexes are available from Microchip.

Though moving from the MIPS architecture instruction set to a RISC-V instruction set is a non-trivial task, it’s a relatively straightforward process from a hardware design aspect. It retains the underlying chip design for features like multithreading and hardware virtualization, which MIPS had in place already.

The company’s on-chip fabric was a key selling point that also carries over to RISC-V, where customization is common. The fabric allows for incorporation of hardware acceleration via third-party cores.

Pinpointing These Main Application Areas

MIPS is focusing on the three areas where it’s already well-established—automotive, cloud, and embedded applications. The multithreading support facilitates the management of numerous sensors in a real-time, automotive environment. Zonal architectures, which are becoming common in automotive designs, mesh well with designs that incorporate many cores in a single ASIC.

The focus on the cloud is mostly on the networking side, where data processing units (DPUs), infrastructure processing units (IPUs), and SmartNICs are handling high-bandwidth transmissions in real-time. Here, scalability and multiple cores are key to handling large amounts of data.

The embedded side of microcontrollers and microprocessors is an area where I’ve worked with MIPS platforms in the past, and where RISC-V isn’t becoming more dominant.

MIPS still faces a lot of competition, including other RISC-V players, but its long track record and expertise will definitely make it easier to provide cutting-edge RISC-V solutions.

Check out more of Electronic Design’s coverage of CES 2024. Also check out more videos/articles in the TechXchange: RISC-V: The Instruction-Set Alternative.

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